October ‘14
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Back to PCB Design Roots Interview with Andrew Murrietta CEO of Murrietta Circuits
PCBs Rise from Ashes Salvaging Circuits
Handle BTCs with Care Finding Solder Defects
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CONTENTS
Modern Printed Circuits
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Bottom Termination Components EEWeb FEATURE
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C B C P
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Handle BTCssolder with defects Care on Finding BTC-populated PCBson canPCBs be daunting Finding Solder Defects
The Logic of Oscilloscopes When a Logic Analyzer Adds Value
INDUSTRY INTERVIEW
Murrietta Completes PCB Circuits Restoring the One-Stop Shop
Salvaging Circuits
EEWeb FEATURE PCBs Rise from Ashes Salvaging Circuits
nents at the end of their useful lifecycle. However,
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lectronic waste) growing at an exponential rate
ulated and bare PCBs alike are problematic
the ever-growing stockpile of discarded equipment.
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PCB component-level recycling requires a degree of human intervention, and cost always becomes an issue...pg. 28
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Modern Printed Circuits
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EEWEB FEATURE
Handle
Bottom Termination Components with Care
Finding solder defects on BTC-populated PCBs can be daunting By Will Morrissey, Contributing Writer
The growing variety and complexity of component packaging is making PCB assembly and inspection challenging. Currently, there is an extensive list of different packaging that component manufacturers and chipmakers are using to house their products. The most recent types are in a category all to themselves.
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Modern Printed Circuits
T
he latest types of component packaging are called bottom termination components or BTCs. They include quad flat no-lead (QFN), dual flat no-lead (DFN), small outline no-lead (SON), land grid array (LGA), and micro lead frame (MLF). Many semiconductor suppliers call these same packages by different names. But unlike their BGA package counterparts that have leads or solder balls, BTCs have metallized terminations integrated at the bottom of the package. These metallized terminations are used to make contact with the PCB surface. So, there are no traditional package leads to speak of when it comes to BTCs. Semiconductor suppliers have a distinct love for BTCs because their packaging saves suppliers considerable money by eliminating the extra metal used for connections and package fabrication costs. System and PCB designers have an equal adoration for BTCs because signal traces are shorter, and they provide good thermal connection since the packages touch the PCB.
ALL WELL AND GOOD FOR THE CHIPMAKER This is all well and good for chipmaker and PCB designer. But when it comes to PCB assembly and inspection, that’s another story fraught with concerns and issues that BTCs introduce. In this regard, the industry’s leading organization, IPC, came forward with its IPC-7093 Standard to lend assistance to PCB assembly houses.
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This standard, called “Guidelines for Design and Assembly Process Implementation for Bottom Termination Components,” describes the concerns and problems BTCs pose for such PCB areas as design, assembly, inspection, repair, and reliability. It details techniques for BTC board placement and solder application, as well as provides reflow solder printing and reflow profile recommendations. IPC is upfront about stating that IPC-7093 is “not a complete recipe.” But it does emphasize that its standard identifies many characteristics that influence successful implementation of robust and reliable assembly processes. It also provides guidance information to BTC suppliers about the problems PCB assembly houses face. Meanwhile, on the assembly floor, a series of basic issues is of nagging concern. Just the fact there are no leads or balls brings into question the lack of a stress absorber. Those stresses are brought on by PCB uneven surfaces and material contraction and expansion during temperature highs and lows. Before, package leads and BGA balls served as those stress absorbers. But now, without those, BTCs can only depend on the solder to absorb stresses. Some lead-free solders available today aren’t as malleable as lead solders, further aggravating the issue.
EEWEB FEATURE Also, assembly personnel in many instances have grown accustomed to using underfill material such as liquid epoxy with BGA packages. But BTCs are so low profile they cannot be stabilized using underfill. Further, these no-lead packages feature a large heat slug in the bottom-center area. As soon as the BTC is soldered onto the PCB, the soldering action floats the device up off the surface of that board. Consequently, consistent connections are in doubt.
GET THAT STENCIL PERFECT The stencil design is extremely important; it must be perfectly created so paste is dispensed as accurately as possible to create those consistent connections. With BTCs, assembly personnel have to always keep in mind that connections are on the bottom and underneath the BTC. Unfortunately, this packaging technology prevents assemblers from visually inspecting BTC joints to determine if solder has properly bonded the device to the PCB. The precise amount of solder is of utmost importance to create good solder joint quality and reliability. A tad too much solder paste can cause the BTC to bridge, tilt, or float. On the other hand, the lesser amount of solder can cause opens or voiding defects. Voiding poses the biggest issue for BTCs. A BTC component typically has a large thermal pad and provides no standoff. That means the flux
volatiles cannot escape. As a result, this causes void formation during the reflow process. So-called marginal defects also occur at times. These are flaws caused when insufficient solder is applied to make the necessary contact between the BTC’s bottom side and the PCB pad. In most cases, there’s just enough solder on this kind of connection for the BTC to pass in-circuit (ICT) and functional testing. However, if and when that particular PCB undergoes shock or vibration, the probability is high that particular solder connection cracks or breaks and thus causing an open connection. Freescale Semiconductor has conducted extensive research into PCB assembly issues and defects when it comes to BGAs and BTCs. Like other industry experts, the company places considerable emphasis on stencil accuracy. Aside from stencil details, it reports a variety of findings in the document, “Manufacturing with the Land Grid Array Package.” The company states, “The historically recommended ceramic ball-grid array (CBGA) 0.20mm (8 mil) thick stencil with 0.72 mm (28.5 mil) diameter apertures provides excellent assembly results with the LGA. It goes on to say, “This combination results in approximately 4800 mil3 of solder paste applied to the pads. Freescale has tested both laser cut and chemically etched stencils with positive results.
“Semiconductor suppliers have a distinct love for BTCs because their packaging saves suppliers considerable money.”
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Modern Printed Circuits
Additionally, recent studies resulted in successful assembly with a 0.15 mm (6 mil) thick stencil with aperture diameters ranging from 0.56 to 0.89 mm (22 to 35 mil). As with BGA assembly, Freescale recommends actual paste volume of 7000 mil3. However, Freescale and customers have successfully built boards using the minimum allowable paste volume of about 4800 mil3.
INSPECTION As noted earlier, assembly personnel cannot view the solder joints on BTCs with their eyes. Visually determining whether or not there’s too much or not enough solder on these tiny joints is out of the question. Also, PCB assembly personnel have to contend with the fact QFNs and LGAs usually don’t have solderable side terminations or are poorly solderable due to the chipmaker’s manufacturing process. Even with this issue facing them, they have to rely on X-ray, and the more advanced it is, the better to locate BC solder flaws and defects. Automated optical inspection or AOI is another story. There are few issues associated with AOI when it comes to the more conventional device packaging. However, BTCs pose a major problem for today’s AOI technology. In effect, there is no correct algorithm for many BTC packages. Having the proper AOI algorithm in this instance may be a moot
question since terminations are under the device, thus presenting viewing problems for AOI during PCB inspection. In the case of a QFN, the main bulk of edge joints and entire central joint are hidden from view. With regard to X-ray, most equipment cannot automatically do a complete inspection on BTCs. On the other hand, some X-ray systems can automatically perform the inspection. However, in those instances, the results are questionable and their accuracy is troublesome. Conventional X-ray equipment is not properly geared to detect many common ball-grid array (BGA) package defects. That means these earlier generation inspection systems cannot comply with BTC inspection demands. Along that same line, it’s important to note that most BTC packages have an exposed die attach pad or DAP feature. This creates even more of a challenge for inspection than BGAs. For example, many QFN packages have the exposed DAP on the package’s bottom surface to provide a more direct thermal interface with the PCB surface. The DAP or other elements inside the BTC component can shadow the solder joint. The result is an unclear X-ray image and inaccurate voiding data. As far as X-ray efficiencies for BTCs, there are two camps. There are the modern 2D X-ray systems advocates and the 3D X-ray crew. The 2D X-ray PCB assembly
“A host of issues need to be resolved for no-lead packages.”
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EEWEB FEATURE group says these systems provide a fast, effective, and nondestructive way for inspecting such BTCs as QFNs. These systems include excellent magnification, resolution, contrast sensitivity, and high-angle oblique viewing. Let’s take a defect example on a QFN. A lowmagnification image of the QFN can pin point a suspected metalized lead. This possible defect can be clearly seen at low magnification thanks to the X-ray system’s high resolution and contrast sensitivity.
SUMMARY Both chipmakers and OEMs are pushing further into BTCs because these packages offer great benefits to them. But at the PCB assembly level, there are a host of issues that need to be improved or resolved to allow this new category of no-lead packages to have a more commanding prominence on the assembly floor.
3D automatic X-ray inspection (AXI) proponents say it’s nearly impossible to find QFN solder joint defects with 2D X-ray. They say a good solder joint looks much like a bad one when using 2D X-ray. However, 3D AXI views a solder joint profile, accumulates measurement data, and compares those measurements with those of a good solder joint. An open joint is an example of a QFN defect. Its traits are a higher solder-center thickness measurement, a narrower center width, and a smaller slope of the outer edges of the joint. 3D AXI takes measurements of these different traits associated with good QFN solder joints. It then establishes them as standard values as the basis for testing BTCs on subsequent PCBs. Other QFN solder defects 3D AXI can uncover include smaller solder joints due to insufficient paste deposits and marginal joints.
“With X-ray efficiencies for BTCs, there are two camps: the modern 2D X-ray systems advocates and the 3D X-ray crew.”
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Modern Printed Circuits
The Logic of
Oscilloscopes Understanding when a logic analyzer adds value to your mixed-signal scope By Frédéric Leens, CEO of Byte Paradigm, Belgium & Alan Lowne, CEO of Saelig Co. Inc., New York
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TECH REPORT
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With mixed-signal oscilloscopes (MSOs) being everyone’s “engineering” Swiss Army knife, why would anyone need an additional logic analyzer. MSOs with sampling rates in the GHz range and 8 or more digital lines are now available for well under $3,000 and some even under $1,000. For this reason, many in the electronic industry are announcing the demise of the logic analyzer as a piece of stand-alone equipment.
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Modern Printed Circuits
I
t is no surprise that mixedsignal oscilloscopes are to be found in most electronic engineering labs today. They are versatile, affordable, and have become the basic instrument for any engineer who is testing, debugging, or verifying electronic systems. In fact, this may be the only instrument that most electronic engineers will ever have to or perhaps want to use for 90 percent of their lab time. So, it is wise to spend part of an initial engineering or testlab budget on an MSO. But does this mean that there is no longer any need for a logic analyzer (LA)?
Oscilloscopes Versus Logic Analyzers Digital oscilloscopes and logic analyzers are based on sampling techniques. Signal, usually voltage, measurements are transformed into a digital value by a highspeed analog-to-digital converter (ADC) and stored into memory at regular time intervals defined by the instrument’s sampling clock. A logic analyzer can be thought of as a scope with 1-bit vertical resolution on all channels. It displays signals as logic (binary) values, according to whether the measured voltage is above or below a conventional voltage level called the “threshold value.” That is the first fundamental difference between an oscilloscope and a logic analyzer.
Full resolution
1-bit resolution
“A fundamental difference between an oscilloscope and a logic analyzer is how the sampled values are displayed.”
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TECH REPORT The other fundamental difference between an oscilloscope and a logic analyzer is how the sampled values are displayed. In its most common mode of operation, an oscilloscope is essentially a device that repeatedly captures a window of events of a given length (defined by its total memory) and refreshes the display of a portion of it on a screen. Many oscilloscopes simulate “persistence” by superimposing multiple captured windows on the display and by modulating the screen pixel intensity. A logic analyzer is mostly used for single-shot captures (no superimposition of successive captures) and to analyze the sequence of events of sometimes over more than 100 digital signals before and after a trigger event.
It was the appearance of microcontrollerbased systems that required the creation of tools like logic analyzers. First, there was a need to observe digital busses, therefore requiring more than two or four channels. Second, there was a need to see the signals the way logic circuit does, i.e. at the sampling events of the circuit, in the form of binary values. Over time, logic analyzers have evolved into less “pure” instruments, with an ability to perform some analog measurements such as for checking threshold levels, detecting glitches, and verifying the compliance of signals to specific input-output standards.
“Real-Time,” Really? It is very common to hear that the real-time display capability is the main difference between a scope and a logic analyzer. In fact, the automatic display refresh may mislead users into thinking that the user sees data as it occurs. But the scope display is not really refreshed faster than the eye is able to see. In most cases, a logic analyzer (LA) is used by first capturing data and then analyzing it. The logic analyzer’s repetitive trigger capability also enables refreshing the display based on the repetitive occurrence of a trigger event. It is true that data is displayed and presented differently in digital scopes and LAs, but fundamentally, both tools operate by sampling signals and storing the samples into memory.
“Seeing relevant data is more important than seeing all the data.”
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Modern Printed Circuits
MSO = Oscilloscope + Logic Analyzer? Well, mostly. A mixed-signal oscilloscope features analog channels (usually 2 to 4) and digital channels (usually 8 to 16). On both types of channels, data is sampled at the MSO’s maximum sampling rate, 1GHz, typically. The sampling clock is usually generated internally by the MSO. In other words, the reference time base for sampling is not correlated with the data. This is what is referred to as “timing analysis.” And of course, the logic analyzer’s vertical signal resolution is reduced to 1 bit for the digital channels. MSOs are able to perform some of the functionality traditionally reserved for LAs:
screen is certainly an improvement compared to using a scope and a logic analyzer separately. With electronic systems evolving towards more complexity, debugging often involves finding a mix of analog and logic problems. An MSO’s triggering can be defined by either type of signal. Repetitive (oscilloscope-like) or singleshot (logic analyzer-like) types of display can be used as well. But displaying both analog and digital recording on the same screen as time-correlated data is one of the biggest advantages of MSOs.
MSOs in Need When you think you need a logic analyzer, consider the following:
• Timing analysis on digital signals. • Ability to see more than 2 or 4 channels; on modern MSO, 16 digital inputs are available. • Digital signal integrity check. In this respect, being able to visualize both the analog extension of a digital signal and its digital version on the same
“The FPGA world is so advanced that observing chip behavior through external digital input-outputs may not make much sense any more.”
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1. Logic analyzers have a larger number of digital channels than MSOs. Traditional bench-top logic analyzers can count up to 128 digital channels or more. On MSOs, there are usually a maximum of 16 channels. Applicationspecific integrated circuit (ASIC) and fieldprogrammable gate array (FPGA) design
TECH REPORT engineers, who are heavy LA users, often need 32 to 64 signals and more to decode bus transactions or visualize the internals of a FPGA. But for 80 to 90 percent of the time, however, and even if you are involved in IC design, 16 digital channels are plenty. The rare 1 to 10 percent cases where you’d like to see 100 digital signals in parallel may not justify the investment in a high-end 100-channel logic analyzer which can cost over $20,000. FPGA design is an area where large channel-count logic analyzers used to be basic equipment for debugging. Adding a connector on board and observing the chip through its input-output, or even putting a debug connector on chip-tochip interconnections was very useful for troubleshooting the design. But thanks to its programmable nature, FPGAs allow many internal nodes to be monitored by simply routing them on to the input-outputs connected to the LA. Things have changed; the FPGA world is getting so advanced that observing chip behavior through external digital inputoutputs may not make much sense any more, even if you can see 100 of them in parallel. Today, an FPGA may run at over 300MHz internally, and putting a 100pin high-speed parallel connector on a board brings excessive board constraints (noise, number of layers, crosstalk, etc.) In addition, the chip input-output buffers sometimes are unable to run at the same speed as the internals of the chip. Other approaches, such as using embedded logic analyzers or software-based
debugging, have now become far more efficient and cost effective. The “number of digital channels advantage� of logic analyzers versus MSOs must be considered cautiously. 16 to 32 digital lines will be enough for most engineers. Logic analyzers with 68 to 100 or even more channels can make a difference where there is an absolute need to see more digital signals in parallel. However, this must be carefully balanced with the constraints of adding the required debug connector to a system. In a context where the digital complexity shifts towards inside the chip, it is increasingly difficult to probe highfrequency signals without creating signal or data integrity issues. For this reason, the investment of usually less than $20,000 in a logic analyzer with a large channel count may be worthwhile. 2. Logic analyzers have a larger memory than MSOs. While there may be exceptions since MSO equipment is constantly evolving, one potential strength of a logic analyzer is that it can justify its addition to an existing MSO setup because it helps in seeing a larger window of time before and after a triggering event. Seeing a larger time of execution of a digital system is of great value during debug. It has the potential to speed up an understanding of why a bug occurs and hence speed up bug correction. It can pay for itself rather quickly! Additionally, a large total available memory size in a logic analyzer
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Modern Printed Circuits
adds significant value to an MSO. Large memory means seeing more history of observed signals. 3. Logic analyzers allow more complex triggering or data filtering than MSOs. The total amount of available memory is not the only parameter to consider. How the instrument uses the memory to store data is equally important. How much of the signal history is observable? How useful is this information in debugging the system being tested? Consider how logic analyzers and MSOs select data. Most MSOs are able to trigger on simple events such as a voltage level, or a digital value, or transition on specific digital lines. Where they also provide simple serial bus decoding such as I²C or SPI, MSOs can also be useful for utilizing serial triggers, that is, stopping the capture on the occurrence of a predefined serial value on a digital line. On the other hand, all logic analyzers are able to trigger on a parallel value. They are also able to build up complex sequences of conditions to ultimately trigger the capture of data. Many digital system busses are quiet most of the time. Basic logic analyzers, even when they are fully loaded with memory, risk wasting memory resources with samples even if nothing happens. To make the most of the logic analyzer memory, several strategies coexist. Therefore, some logic analyzers only store data transitions,
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thereby potentially compressing the collected data. This is a somewhat uncontrolled way to save on memory and is highly dependent on the data itself. Another strategy for economical storage consists of using logic equations on the recorded data to define the conditions when the logic analyzer should store the data or when it can discard it. Data qualification, or data filtering, is the ability of the logic analyzer to record only the data that matches user-defined criteria. In this case, the logic analyzer is also referred to as a digital data logger. This strategy is based on prior knowledge of the debugged digital system. It can be as simple as detecting a signal level (e.g. an output enable) and recording the values of a bus when this level is seen. Or it can be much more complex,
“With electronic systems evolving towards more complexity, debugging often involves finding a mix of analog and logic problems.”
An example of a logic analyzer with long memory and complex triggering options for data analysis is the LOG Storm - Logic Analyzer - High Speed Data Logger.
• Large 8-Meg Sample memory (20-bit). • State analysis up to 125MHz.
• Advanced data qualification. • SPI and I2C monitoring, zero latency trigger rearm, and more.
TECH REPORT
The digital data logger filters data: only qualified data is sampled.
like a filtering when a Boolean equation from certain digital lines is true, or even recording a predefined data quantity each time a trigger condition is encountered. Total available memory is important, but efficient data storage, data qualification, and rich triggering options bring significant value to different logic analyzer products. Seeing relevant data is more important than seeing all the data. A logic analyzer capable of data qualification or data filtering, which is sometimes referred to as a data logger, is an excellent companion tool to an MSO. 4. Logic analyzers look at signals the way hardware does. Unlike most MSOs, logic analyzers are able to use the reference sampling clock signal of the system under test. This means looking at the sampled signals in sync with the eyes of your hardware. This is mode is called “state analysis,” as opposed to “timing analysis,” where the sampling clock is generated by the equipment itself. Running equipment in state analysis mode can be a challenge, because a clean reference clock signal from a system under test may not always be available. Nevertheless, state analysis will provide close insight into a system’s embedded software, allowing focus to be placed on the information seen by the hardware and speed up debugging.
Interesting data is seen.
Conclusions Mixed-signal oscilloscopes are extremely well-suited to most basic and advanced testing and debugging tasks on all kinds of electronic systems. For this reason, the investment in an additional external logic analyzer must be thought out carefully. Picking a logic analyzer just because it has 100 channels won’t probably be worthwhile, since alternative and more cost-effective debugging strategies exist. But a logic analyzer with a multimegasample memory, state analysis capability, and data qualification capability will add value to any common MSO. A logic analyzer chosen with these features can view a system the same way as a circuit does and save data during large windows of time. This kind of logic analyzer is an ideal companion to a traditional MSO since it provides the complementary analysis that can speed up debugging tasks and make any engineer more efficient in debugging complex digital problems, not only adding value to an MSO, but adding value to your employment!
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Modern Printed Circuits
Murrietta Completes
PCB CIRCUIT
Restoring the One-Stop Shop By Alex Maddalena, Contributing Writer
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INDUSTRY INTERVIEW
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hen it comes to circuit boards, customers are increasingly gravitating towards firms that offer a streamlined approach to avoid headaches. In order to maintain reliable, quick-turn PCB production, original equipment manufacturers have had to get creative with their supply chain and use multiple companies to design, fabricate, assemble, and test their boards. This approach lacks integration and can lead to finger pointing among the various suppliers if something goes wrong, which happens often with new designs. Murrietta Circuits, an Anaheim-based circuit board house, has developed a unique strategy to solidify their status in the industry: they do everything under one roof. Within the company’s 50,000-square-foot facility, they design, manufacture, assemble, and test boards as one vertically integrated chain. With easy communication between teams, Murrietta offers a comprehensive manufacturing process—the culmination of 30-plus years of experience. With these crucial advantages, Murrietta is able to grow all aspects of their business, which has led to unique partnerships and innovations that could revolutionize the industry. EEWeb spoke with Andrew Murrietta, CEO of the company, about how harkening back to the roots of PCB design and partnering with other key firms in the industry has led to new and exciting advancements in circuit technology.
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Modern Printed Circuits
Under One Roof Founded by Albert G. Murrietta in 1980, Murrietta Circuits started out as a simple PCB design house in Anaheim, California. From there, it grew into bareboard fabrication in the late 80s and full board assembly in the mid-90s. In 2002, the company moved into its current, 50,000-square-foot facility where they do PCB design, manufacturing, assembly, and board testing all under the same roof. “We combined this business model because we felt that the industry had lost something,” Murrietta explained. Back in the 1980s, big companies like IBM and Lockheed built the majority of their circuit boards through internal manufacturing and assembly operations. In the 1990’s they moved to the outsourcing models that are more prevalent today. While there are benefits to that model, Murrietta believes outsourcing leads to losing touch on how key elements of design and manufacturing work together. “We believe there is a logical integration to our model,” he claimed. “We built this facility from the ground up with idea of combining all these operations together, which allows all processes to better communicate. Getting design, engineering, and manufacturing together is when innovation can really accelerate.” For Murrietta, communication is key. To get a better quality bare board, you need a good quality design, and in order to get a good assembly you need a good quality bare board. All of these elements are codependent on each other, and it takes good
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communication to execute reliably. Over the years, Murrietta has acquired new customers because of problems with quality at other assembly houses. After investigating the root cause, the Murrietta team often discovers that the real problem is in the design itself, or the board manufacturing, or some combination thereof. “In many cases, it’s just a problem of all the entities not talking to one another to optimize the process for quality and yield,” Murrietta explained.
Integrated and Streamlined By combining all aspects of the manufacturing process, Murrietta offers a streamlined approach that guarantees product quality. “We understand design for manufacturability and design for testability,” Murrietta remarked. “We take all the lessons learned and incorporate them as early in the product development cycle as possible.” The goal is to save a revision spin, which ultimately saves the customer time and money. The integrated process also enables a better quality record, with precise serialization and traceability. Since Murrietta controls all aspects of the operation, customers benefit with one point of contact for the entire process, a valuable service not commonly seen in the industry today. The company’s full turnkey service also allows for greater quality control over the components of the board, which is where a majority of the dollar value of a typical circuit board resides. Some boards might have 100 to 200 unique line items on the bill of material.
INDUSTRY INTERVIEW The primary function of the Murrietta program management team is to ensure that all of the components arrive at the same time. “Our program managers are key to our success, as the logistics of all these items becomes quite a task,” said Murrietta. “They will coordinate,” he continued, “the purchasing and the manufacturing schedules so that they come together at the right time to be able to produce the assemblies. This is where we add value.”
Beneath the eSurface High levels of integration have not only helped the company develop an incredibly valuable process, but have also led to unique innovations and
partnerships. Recently, Murrietta Circuits announced a licensing partnership with eSurface® Technologies, developers of the eSurface additive method for creating PCBs. As a result, Murrietta can now tackle industry demands head on—most notably the need for smaller etch features on circuit technology at a lower cost. Moore’s law has predicted this size reduction at the silicon level, but it has been very limiting for circuit board technology as circuits are made out of what essentially is fiberglass. eSurface technology, however, presents a solution. As opposed to traditional methods of etching away PCB traces, eSurface is an additive process that coats the circuit allowing it to be built up through plating.
“We combined design, board manufacture, and assembly because we felt the industry had lost something.”
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Modern Printed Circuits
“eSurface technology has the ability to transform the entire industry.” “With eSurface technology, we will be able to get down to 1 to 2 mil lines and 1 to 2 mil spaces while maintaining remarkably high yields,” Murrietta explained. Typical processes in the industry have not been able to go successfully below 3 mil lines and 3 mil spaces, thus forcing blind and buried via’s which require the additional steps of lamination, drilling, and plating, which adds cost, time, and complexity. The eSurface process activates the base laminate (whether it be FR4 fiberglass, Polyimide, Rogers, Teflon, Ceramic, Duriod or various types of flex material) at a molecular level and—through the coating and imaging processes—transfers an image to the laminate that can then be plated up using Murrietta’s fully automated electroless line. The result is a copper-to-laminate bond superior to that of a standard circuit board print-andetch process. eSurface offers both a fully and semiadditive process. Under the semiadditive process, the coating puts a thin plating of copper over the entire panel, so that they build up the circuit using both electroless and electrolytic
plating, while only etching away a very thin layer of copper, which results in highly consistent signal lines and shapes, a key benefit to the RF industry where signal integrity is crucial. “From a processsimplicity level, the most appealing aspect is the fully additive process,” said Murrietta. “It essentially starts off with no copper on the outer surface, which,” he noted, “eliminates more than a dozen steps in the circuit board fabrication process while being much more environmentally friendly. This really has the potential to transform the entire industry.” eSurface’s revolutionary process has opened up the company’s horizons and business prospects. Murrietta foresees this technology taking off in the military, aerospace, and medical industries, as well as the emerging wearable electronics field as they require small, reliable, flexible, and more powerful solutions. With each new chip release from the semiconductor industry, the center-tocenter spacing on the ball-grid arrays, known as the BGA pitch, also continues to shrink—they can now be as small as .4mm to .25 mm. “When you get down that small, it’s difficult for designers
“The process activates the fiberglass at a molecular level and transfers an image to a bare piece of fiberglass that produces an electroless plate.”
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INDUSTRY INTERVIEW eSurface at a Glance to route any type of circuit traces out of the package,” Murrietta stated. “Their limitation is the current circuit board etching technology.” Before the eSurface process was developed, there was nothing on the horizon that could meet this demand. Murrietta offered his opinion on the disparity between what the chip companies expect out of ever-shrinking, powerful circuits versus the ability to provide a capable circuit board: “The two industries have been on a collision course for a long time. This is the industry’s biggest challenge and eSurface is providing the solution.”
Assemble Responsibly Murrietta Circuits will be rolling the eSurface process process out later in the year. They are targeting 2 mil lines and 2 mil spaces with high yields by the end of 2014, the overall goal being to reach 1 mil lines and 1 mil spaces by the middle of next year. There are serious value propositions in this technology and in the integrated process in general. “We are a one-stop shop that takes responsibility for all aspects of design, manufacturing and assembly, which is why,” Murrietta concluded, “eSurface chose us to be one of their first licensees.”
Automated eSurface system.
The eSurface proprietary additive process builds conductive materials from the surface of a bare laminate material. In a lighting-controlled environment, a thin, uniform deposition of chemicals is applied to the surface where it is then ready for the photographic image. A UV light is used to activate the circuit pattern into the substrate surface. After the materials are dried, the remaining metal image acts as the foundational layer for subsequent plating or metallization built up. The result is a remarkably efficient and cost-effective process that will allow for cheaper, smaller, and ultimately, more functional electronics. For an in-depth look at the eSurface process, watch the video below:
https://www.youtube.com/watch?v=qoCWU2djmKc
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Modern Printed Circuits
Rise from Ashes By Colin Jeffrey, Contributing Writer
P
CB design and production face tight performance specifications that result in utilizing whatever components are best suited to achieving that goal. Under these
conditions, little thought is generally given to eventual disposal of these components at the end of their useful lifecycle. However, with e-waste (electronic waste) growing at an exponential rate worldwide, populated and bare PCBs alike are problematic components of the ever-growing stockpile of discarded equipment.
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EEWEB FEATURE
Salvaging Circuits
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Modern Printed Circuits
E-Waste Not PCBs require extensive work to retrieve their eclectic mix of materials. Along with copper, zinc, aluminium, and tin in their basic make-up, there are the more exotic elements—such as tantalum and palladium—contained in the components attached to the PCBs or part of the PCBs themselves that present a challenge for waste disposal channels. In addition, many of the constituents of a PCB may contain toxic or even carcinogenic chemicals and materials, which are also difficult to separate from their surrounding components. As a result, particularly in poor or immature recycling regimes, there is a high risk that many rare-earth or valuable metals can be lost in the conglomeration of chemicals, metals, and plastics with which they may be disposed, as well as increasing the possibility that noxious elements may eventually leach into the environment. The nonprofit Silicon Valley Toxics Coalition reports that up to 70 percent of heavy metals in U.S. landfills come from discarded electronics. On the upside, properly recycled PCBs can recover many of the exotic materials that can then be reprocessed and reused time and again, saving both money and waste to landfill. Savvy manufacturers have cottoned to the advantages of purchasing such reconstituted materials in which they can not only benefit
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monetarily, but they can also play their part in helping to reduce the heavy dependence nonlocal or international suppliers of rare earth elements. Given that estimates of remaining tantalum in the ground worldwide is around 50 years’ worth, this is also a smart way to help ensure ongoing supply of an essential, but dwindling, resource. As for other recoverable metals, the U.S. EPA claims that for every millioncellphones recycled (including their PCBs), 35 thousand pounds of copper, 772 pounds of silver, 75 pounds of gold, and 33 pounds of palladium can also be recovered.
Crush, Sort, Agitate An increasing number of recyclers both in the U.S. and overseas is applying a range of techniques to salvage the various reusable constituents of PCBs. The recycling process for metals and components is becoming increasingly sophisticated. Basic recycling utilizes an array of techniques, including magnetic or eddy current metal separation, trommel screens (basically enormous drums with a series of graduated screens designed to separate pieces by size), and chemical dissolving methods to
EEWEB FEATURE
separate glass, plastic, and ferrous and nonferrous metals for further separation and smelting. Of course, these methods require the prior destruction of basically all of the components by crushing and granulating prior to applying them, but basic metals retrieval is high and very efficient. An ideal waste recycling plant for electronic waste combines the standard crush and sort method with initial dismantling of PCBs for component recovery offset by increased costeffective treating of bulk electronic waste. This way, components that can be reused in low-tech or noncritical systems can be salvaged and sold on, particularly to the hobby electronics market, where good quality secondhand components draw a premium or to electronics manufacturers of nonvital equipment prepared to pretest components.
The EPA claims that for ever y million cell phones recycled (including their PCBs), 3 5 thousand pounds of copper, 7 72 pounds of silver, 75 pounds of gold , and 33 pounds of palladium can be recovered .
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Modern Printed Circuits
PCB recycling utilizes an array of techniques , including magnetic or eddy current metal separation , trommel screens , and chemical dissolving methods . This type of reconstitution can be partly achieved with methods using inorganic solvents and specific forms of agitation to achieve a more benign method of removing solder without heat, but subsequent component recovery is largely restricted to destruction and reconstitution of the metals contained therein. Of course, further pollution and hazardous chemical solvents are also generated in this way and they, too, must be disposed of adding to the recycling headache. As a possible solution to this dilemma, recent work by researchers at Zhejiang Gongshang University in China suggest that the solvent dimethyl sulfoxide (DMSO) may eventually be successfully substituted for other inorganic solvents to simply swell the polymer resins in PCBs to make tracks and components come away mechanically, rather than by dissolving the resin of the boards completely. This research also claims that the DMSO can then be continually recycled and used time and again, thereby much reducing the disposal problem.
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Scrap Values Unfortunately, regardless of future recycling methods, the current way to achieve true component-level recycling still requires a degree of human intervention, and cost always becomes an issue. As a result, despite the best efforts and continuing innovations of U.S. recyclers and those in other developed countries, the shipping of e-waste in bulk to countries where labor costs are minimal is still the most common method of PCB salvage. China, the second largest producer of e-waste after the U.S., is still the major dumping ground for the world’s electronic waste where—despite the fact that the Chinese government has officially banned their import—millions of tons of electronic equipment is shipped, dismantled, and recycled cheaply with little apparent care about environmental fallout.
EEWEB FEATURE
As such, in developed countries, support of efforts to recycle PCBs and their associated components—or even incorporating at least a partial recycling of reject boards rather than outright scrapping—may appear to cost a little more at first glance. However, the longterm benefits of safer environmental practices, local delivery, support for the local community, keeping jobs and money in country, along with the added benefit of reducing reliance on foreign materials and suppliers could make up for higher short-term costs.
References
“Answering the E-Waste Question.” http://www.bjreview.com.cn/quotes/ txt/2014-07/27/content_631291.htm “Dissolution of Brominated Epoxy Resins by Dimethyl Sulfoxide to Separate Waste Printed Circuit Boards.” http://pubs.acs.org/doi/abs/10.1021/ es303264c “One Person’s Trash Is Another’s Technology.” http://www.scientificamerican.com/article/ earth-talk-recycling-e-equipment/
PCB component- level recycling requires a degree of human inter vention , and cost always becomes an issue.
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